Anil Krishnamurthy Senior Hardware Engineer
Santa Barbara, CA • anil.krishnamurthy@gmail.com • +1 805-555-0169
Profile Summary
- Senior Hardware Engineer with 10 years of experience building wireless speakers and streaming devices at a home audio company and a streaming device maker, focused on system architecture, board bring-up and NPI builds from the first prototype to mass production.
- Hands-on with EDA (Altium Designer, Cadence Allegro), processors such as Arm Cortex-A, interfaces (LPDDR4, USB-C), test automation in Python and PLM in Arena PLM.
- Deep experience in prototype bring-up, DVT test automation, drop and ingress reliability and contract manufacturer builds, using test plans traced to requirements and a failure Pareto after every build to ship products that reach mass production on schedule.
- Works closely with mechanical, firmware, industrial design and sourcing teams through EVT, DVT and PVT builds at overseas contract manufacturers, from the first block diagram to the mass production sign-off.
- Mentors junior engineers on board bring-up and failure analysis, runs the build readiness review, and wrote the bring-up checklist the team uses on every new board.
Technical Skills
- EDA & Design Tools:
- Altium Designer, Cadence Allegro, Altium 365, KiCad
- Processors & Interfaces:
- Arm Cortex-A, STM32, LPDDR4, USB-C, PCIe, MIPI CSI-2, I2S
- Signal Integrity & Simulation:
- HyperLynx, LTspice, Cadence Sigrity, Ansys Icepak, MATLAB
- Lab & Debug Tools:
- Oscilloscopes, Python, SEGGER J-Link, Saleae logic analyzers, Audio Precision APx555, thermal cameras
- Reliability & Validation Methods:
- FMEA, HALT, thermal cycling, drop and tumble testing, IP67 testing, accelerated life testing
- Production & DFM:
- EVT/DVT/PVT builds, DFM, DFT, ICT, functional test fixtures, IPC-A-610, failure Pareto analysis
- PLM, Sourcing & Compliance:
- Arena PLM, Jira, Octopart, FCC Part 15, CE marking, UL 62368-1, RoHS
Education
Work Experience
- Defined the hardware architecture of a battery-powered portable speaker, choosing a quad-core Arm Cortex-A53 SoC, a Wi-Fi 6 and Bluetooth LE module and a 2-board split, then ran the battery and thermal trade study behind the 14-hour playback target that the first EVT units met.
- Owned the schematics for the 10-layer main logic board and its microphone array board in Altium Designer, set the LPDDR4 and USB-C routing rules for layout and ran 3 design reviews, so EVT needed only 2 rework fixes.
- Brought up 4 prototype builds with the firmware team, chasing boot hangs and audio dropouts with a SEGGER J-Link debugger, a Tektronix oscilloscope and a Saleae logic analyzer, and cut the time to first boot on a new build from 5 days to 2 days.
- Wrote the DVT test plan against all 186 hardware requirements and built Python test stations around an Audio Precision APx555 audio analyzer and a Keysight power supply, cutting a full validation round from 9 days to 3 days.
- Planned the reliability tests with the lab, from HALT and thermal cycling to IP67 immersion and 1.2 m drop tests, then traced a cracked battery connector to a missing strain relief and raised drop test survival from 82% to 99%.
- Ran 3 builds at our contract manufacturer in Malaysia, EVT through PVT, writing each build plan and the daily failure Pareto, and closed the top 12 yield issues before mass production, lifting final test yield from 88.4% to 97.6%.
- Cut $7.40 per unit from the BOM by qualifying second sources for 38 parts found through Octopart and moving to standard 18650 cells, and kept the line running through a PMIC shortage with an alternate qualified at DVT.
- Started a weekly integration review with the mechanical, firmware and industrial design teams to settle connector placement, heat paths and antenna keep-outs early, which let the program skip a planned EVT2 build and save 6 weeks.
- Designed the main board of a 4K streaming stick in Altium Designer, fitting the SoC, a Wi-Fi 5 module and the HDMI 2.0 connector on a board just 52 mm long.
- Ran thermal validation on 5 streaming players in a Thermotron chamber, and a heat spreader change kept the SoC 8°C below its throttling point in a 35°C room.
- Wrote the factory test spec for 3 player and remote products and worked with the ODM test team in Shenzhen to cut test time per unit from 95 s to 60 s.