Electrical Engineer Resume
Skills & ATS Keywords

Plan on 40 to 55 named items: simulation tools, power topologies, motor-control methods, lab instruments, regulatory standards, and certifications, sorted into 7 to 8 electrical-discipline rows. Below 34 reads as a fresh-grad file that has not yet sat next to a power analyzer; above 62 starts reading like a databook instead of an engineer. Each chip should track back to a converter you closed efficiency on, a motor you brought into FOC, an RF front-end you matched, or a CISPR / IEC report you signed off.

Park the Technical Skills block right under the Profile Summary, ahead of the project history. Electrical hiring managers read in three sweeps: the summary, the simulation + topology rows, then the converters and machines you actually shipped. Workday, iCIMS, and Greenhouse all give heavier keyword weight to a labeled block near the top. Split the inventory into 7 to 8 named rows by electrical discipline (Power Electronics, Motor Control, Analog + Mixed-Signal, RF, Battery + BMS, Simulation, EMC + Safety, Lab + Standards) instead of one long comma string.

Pull 16 to 22 of the most frequent nouns out of the requisition: the simulation stack (MATLAB / Simulink, PLECS, LTspice, ANSYS Maxwell), the power devices (IGBT, SiC, GaN), the motor-control vocabulary (BLDC, PMSM, FOC, SVPWM), the RF stack if it applies (S-parameters, LNA, PLL, Wi-Fi 6E / 5G NR), and the regulatory acronyms (CISPR 32, IEC 61000, UL 508A, AEC-Q100, IEC 60601, DO-160). Drop every one of them into the Skills row AND into the bullet that proves the claim. Then push the file through an ATS Checker so you can see what the parser actually picked up.

An Embedded Software Engineer resume reads as firmware on the MCU or SoC: RTOS, drivers, ISRs, bare-metal C, board bring-up from the firmware side. A Hardware Engineer resume reads as the digital + mixed-signal PCB owner shipping product boards: Altium or Cadence Allegro all day, DDR5 + PCIe Gen 5 routing, signal-integrity sign-off, EVT / DVT / PVT. An Electrical Engineer resume sits broader and deeper on the physics side: power-electronics topologies (buck, boost, LLC, three-phase inverter), motor drives (BLDC, PMSM, FOC), RF front-ends (matching networks, LNAs, antennas), high-voltage and isolation design, magnetics, EMC chamber work, and the cert vocabulary (CISPR, IEC 61000, UL 508A, AEC-Q100, IEC 60601, DO-160). If the file shows firmware ISRs and drivers, you read as Embedded; if it shows multi-layer stackups and DDR5 routing, you read as Hardware; if it shows three-phase inverter efficiency, FOC torque ripple, EMI margin in a chamber, or a PE-stamped single-line drawing, you read as Electrical.

It depends on the lane. For industrial controls, utility and grid work, building electrical, energy + renewables, and anything stamped on a single-line drawing or NEC submittal, a PE is treated as table stakes at senior and a hard requirement at staff. List the PE state and discipline up top, next to the IEEE Senior Member tag if you carry one. For consumer electronics, automotive power, aerospace, and most semiconductor-side EE roles, the PE is optional and recruiters do not filter on it. If you have the EIT / FE only, list that plus the PE exam date you are sitting in the cert row. If you are senior in an industrial or utility lane and the license is missing, address it explicitly in the summary.

Specialize on the file you submit, even if you can run two of the four in real life. The hiring manager and the parser both score sharpest on a clearly named depth. If you are targeting traction-inverter, BMS, or industrial-drive roles, lead the Skills block with power electronics + motor control (SiC, GaN, FOC, MTPA, SVPWM, IEC 61800, AEC-Q100). If you are aiming at RF and wireless, lead with S-parameters, matching networks, LNA + PA, antennas, and the band list (Wi-Fi 6E / 7, LTE, 5G NR). If your depth is analog instrumentation, lead with op-amps, ADC + DAC topology selection, filter design, and low-noise PCB practice. The remaining domain stays present as a single supporting row, not as 30 percent of the file.

Five metric families carry an Electrical Engineer file. Converter performance (efficiency percent at rated load, kW / liter or W / cubic inch power density, junction-temp headroom, output ripple). Motor-drive performance (torque ripple percent, current-loop bandwidth in Hz or kHz, MTPA / field-weakening operating range). EMI / EMC margin (dB margin against CISPR 32 Class B, conducted + radiated peak vs limit, IEC 61000-4 immunity level pass). Regulatory closure (UL 508A / 1741, CE LVD/EMC, FCC Part 15, AEC-Q100 grade, ISO 26262 ASIL, IEC 60601, DO-160 section). Sim-to-bench correlation (PLECS or Simulink prediction vs measured efficiency, eye, or thermal within X percent). Pair each one with the simulation tool, the lab instrument, or the standard that produced it so both the recruiter and the parser pick the proof up.